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Optimum buffer size for dynamic voltage processors

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dc.creator Chakrabarti, C
dc.creator Manzak, A
dc.date 2004-01-01T01:00:00Z
dc.date.accessioned 2021-12-03T11:54:50Z
dc.date.available 2021-12-03T11:54:50Z
dc.identifier c49883ab-abe0-46cc-9594-563c7d305ace
dc.identifier https://avesis.sdu.edu.tr/publication/details/c49883ab-abe0-46cc-9594-563c7d305ace/oai
dc.identifier.uri http://acikerisim.sdu.edu.tr/xmlui/handle/123456789/94748
dc.description This paper addresses the problem of calculating optimum buffer size for a dynamic voltage scaling processor. We determine the minimum required buffer size giving minimum energy solution for periodic (single, multiple) or aperiodic tasks. The calculations are based on information about data size (maximum, minimum), execution time (best case, worst case), and deadlines.
dc.language eng
dc.rights info:eu-repo/semantics/closedAccess
dc.title Optimum buffer size for dynamic voltage processors
dc.type info:eu-repo/semantics/article


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