| dc.creator |
ARSLANALP, Remzi |
|
| dc.date |
2023-05-30T00:00:00Z |
|
| dc.identifier |
8dec02b6-319d-45fb-a189-264b9fdc9952 |
|
| dc.identifier |
10.1142/s0218126623501402 |
|
| dc.identifier |
https://avesis.sdu.edu.tr/publication/details/8dec02b6-319d-45fb-a189-264b9fdc9952/oai |
|
| dc.description |
In this study, a novel DDCC-based two-integrator-loop universal active-C biquad with a companding process scheme is proposed. The proposed filter employs some processing blocks such as integrators and summing blocks. The use of the block diagram design procedure is attractive and systematic. The state space synthesis technique is utilized for the topology of the integrator design. Several advantages of the proposed filter are briefly expressed as: simultaneously realizing five second-order filter functions such as low-pass, high-pass, band-pass, all-pass and notch filter responses; offering resistorless realization; dissipating low power; having electronic tunability feature of its pole frequency and quality factor orthogonally; not suffering from disadvantages of the passive element matching problems. Some simulation results including frequency and time domain analysis results by using the PSpice program are carried out to confirm the theoretical ones. All the obtained simulation results are discussed. |
|
| dc.language |
eng |
|
| dc.rights |
info:eu-repo/semantics/closedAccess |
|
| dc.title |
A Novel DDCC-Based Current-Mode Two-Integrator-Loop Active-C Biquad |
|
| dc.type |
info:eu-repo/semantics/article |
|